1. Field of the Invention
This invention relates, in general, to cyclic redundancy checkers (CRC), and more particularly, to quasi parallel cyclic redundancy checkers.
2. Description of Prior Art
A conventional CRC is used to check the stored program in a device upon startup. All the instructions in the program are output one word at a time to a multiplexer, which breaks each word down and transmits one bit at a time to the CRC. This process requires that a second clock be used to trigger the serial output of data bytes from the multiplexer to the CRC, since the bits must be transmitted to the CRC eight times, in an eight bit word, faster than the words are transmitted to the multiplexer. Often this process requires that the transmission of the word to the multiplexer be slowed in order to transmit all of one word serially to the CRC before the next word is input to the multiplexer. The CRC register itself contains 16 D-type flip-flop shift registers (Q.sub.0 -Q.sub.15) where the data is input one bit at a time. As the data is input the bit is combined with several of the previous bits in a cascade of exclusive-OR gates to produce the bit that is stored in the register. Once the entire program has been entered, one bit at a time, a reference word, or words, is entered that, if the program was correct, should clear the registers. If the registers are not cleared this indicates there was an error in the program.
This type of CRC has a number of problems. Often the CRC's are used in systems that have very long complicated programs. Reading one bit per clock pulse takes a great deal of time and reduces the overall efficiency of the device requiring the use of such a circuit.
Another problem arises in the standard parallel transmission of data. Since data is most often transmitted in parallel, this parallel transmission must be converted into a serial transmission before it can be run through the present type of CRC.
Still another problem arises in the need of a separate clock to operate the transmission of data from the multiplexer to the CRC.